SH7616 Datasheet, PDF (631/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Serial
data
Section 14 Serial Communication Interface with FIFO (SCIF)
Start
bit
0 D0
D1 D2
Parity
bit
D7 0/1 1
Start
bit
0
RTS
Figure 14.10 Example of Operation Using Modem Control (RTS)
14.3.3 Multiprocessor Communication Function
The multiprocessor communication function performs serial communication using a
multiprocessor format, in which a multiprocessor bit is added to the transfer data, in asynchronous
mode. Use of this function enables data transfer to be performed among a number of processors
sharing a serial communication line.
When multiprocessor communication is carried out, each receiving station is addressed by a
unique ID code.
The serial communication cycle consists of two cycles: an ID transmission cycle which specifies
the receiving station, and a data transmission cycle. The multiprocessor bit is used to differentiate
between the ID transmission cycle and the data transmission cycle.
The transmitting station first sends the ID of the receiving station with which it wants to perform
serial communication as data with a 1 multiprocessor bit added. It then sends transmit data as data
with a 0 multiprocessor bit added.
The receiving stations skip the data until data with a 1 multiprocessor bit is sent. When data with a
1 multiprocessor bit is received, each receiving stations compares that data with its own ID. The
station whose ID matches then receives the data sent next. Stations whose ID does not match
continue to skip the data until data with a 1 multiprocessor bit is again received. In this way, data
communication is carried out among a number of processors.
Figure 14.11 shows an example of inter-processor communication using a multiprocessor format.
Rev. 2.00 Mar 09, 2006 page 605 of 906
REJ09B0292-0200