SH7616 Datasheet, PDF (730/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 17 16-Bit Timer Pulse Unit (TPU)
Bit 0—Input Capture/Output Compare Flag A (TGFA): Status flag that indicates the occurrence of
TGRA input capture or compare match.
Bit 0: TGFA
0
1
Description
[Clearing conditions]
(Initial value)
• When DMAC is activated by TGIA interrupt while DRCR setting in DMAC is
TGI0A
• When 0 is written to TGFA after reading TGFA = 1
[Setting conditions]
• When TCNT = TGRA while TGRA is functioning as output compare
register
• When TCNT value is transferred to TGRA by input capture signal while
TGRA is functioning as input capture register
17.2.6 Timer Counter (TCNT)
Channel 0: TCNT0 (up-counter)
Channel 1: TCNT1 (up/down-counter^*)
Channel 2: TCNT2 (up/down-counter^*)
Bit: 15
14
13
12
11
10
9
8
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Note: * These counters can be used as up/down-counters only in phase counting mode. In other
cases they function as up-counters.
The TCNT registers are 16-bit counters. The TPU has three TCNT counters, one for each channel.
The TCNT counters are initialized to H'0000 by a reset.
The TCNT counters cannot be accessed in 8-bit units; they must always be accessed as a 16-bit
unit.
Rev. 2.00 Mar 09, 2006 page 704 of 906
REJ09B0292-0200