SH7616 Datasheet, PDF (228/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 6 User Break Controller (UBC)
Name
Abbre-
viation
Initial
R/W Value^*1 Address
Access Size^*2
Break bus cycle register D
BBRD
R/W H'0000 H'FFFFFF68 16, 32
Break execution times register D BETRD R/W H'0000 H'FFFFFF78 16, 32
Break control register H
BRCRH R/W H'0000 H'FFFFFF30 16
32
Break control register L
Branch flag register
BRCRL
BRFR
R/W H'0000
R
*³
H'FFFFFF32 16
H'FFFFFF10 16, 32
Branch source register H
BRSRH R
Undefined H'FFFFFF14 16
32
Branch source register L
BRSRL R
Undefined H'FFFFFF16 16
Branch destination register H
BRDRH R
Undefined H'FFFFFF18 16
32
Branch destination register L
BRDRL R
Undefined H'FFFFFF1A 16
Notes: 1. Initialized by a power-on reset. Value is retained in standby mode, and is undefined
after a manual reset.
2. Byte access cannot be used.
3. Bits SVF and DVF in BRFR are initialized by a power-on reset; the other bits in BRFR
are not initialized.
Rev. 2.00 Mar 09, 2006 page 202 of 906
REJ09B0292-0200