SH7616 Datasheet, PDF (428/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 9 Ethernet Controller (EtherC)
9.3 Operation
When a transmit command is issued from the transmit E-DMAC, the EtherC starts transmission in
accordance with a predetermined transmission procedure. When the specified number of words
have been transferred, transmission of one frame is terminated.
When an own-address frame (including a broadcast frame) is received, the EtherC transfers the
frame to the receive E-DMAC while carrying out format checks. At the end of frame reception the
EtherC carries out a CRC check, completing reception of one frame.
Notes: 1. In actual EtherC operation, frame transmission and reception is performed
continuously in combination with the E-DMACs. For details of continuous operation,
see the description of E-DMAC operation.
2. The receive data transferred to memory by the receive data E-DMAC does not include
CRC data.
9.3.1 Transmission
The main transmit functions of the EtherC are as follows:
• Frame generation and transmission: Monitors the line status, then adds the preamble, SFD, and
CRC to the data to be transmitted, and sends it to the MII
• CRC generation: Generates the CRC for the data field, and adds it to the transmit frame
• Transmission retry: when a collision is detected in the collision window (during the
transmission of the 512-bit data that includes the preamble and SFD from the start of
transmission), transmission is retried up to 15 times based on the back-off algorithm
The state transitions of the EtherC transmitter are shown in figure 9.2.
Rev. 2.00 Mar 09, 2006 page 402 of 906
REJ09B0292-0200