SH7616 Datasheet, PDF (198/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 5 Interrupt Controller (INTC)
5.3.15 Vector Number Setting Register I (VCRI)
Vector number setting register I (VCRI) is a 16-bit read/write register that sets the 16-bit timer
pulse unit 1 (TPU1) TCNT1 overflow/underflow interrupt vector numbers (0–127).
VCRI is initialized to H'0000 by a reset. It is not initialized in standby mode.
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9
8
— TC1VV6 TC1VV5 TC1VV4 TC1VV3 TC1VV2 TC1VV1 TC1VV0
0
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W R/W
Bit:
Initial value:
R/W:
7
6
5
4
3
2
1
0
— TC1UV6 TC1UV5 TC1UV4 TC1UV3 TC1UV2 TC1UV1 TC1UV0
0
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W R/W
Bits 15 and 7—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 14 to 8—16-Bit Timer pulse unit 1 (TPU1) TCNT1 Overflow Interrupt Vector Number 6 to 0
(TC1VV6–TC1VV0): These bits set the vector number for the 16-bit timer pulse unit 1 (TPU1)
TCNT1 overflow interrupt. There are seven bits, so the value can be set between 0 and 127.
Bits 6 to 0—16-Bit Timer pulse unit 1 (TPU1) TCNT1 Underflow Interrupt Vector Number 6 to 0
(TC1UV6–TC1UV0): These bits set the vector number for the 16-bit timer pulse unit 1 (TPU1)
TCNT1 underflow interrupt. There are seven bits, so the value can be set between 0 and 127.
Rev. 2.00 Mar 09, 2006 page 172 of 906
REJ09B0292-0200