SH7616 Datasheet, PDF(488/935 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

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SH7616 Datasheet, PDF (488/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

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Section 11 Direct Memory Access Controller (DMAC)

ï£§ Two on-chip peripheral modules (excluding DMAC, BSC, UBC, cache-memory, E-

DMAC, and EtherC)

ï£§ On-chip memory and memory-mapped external device

ï£§ Two on-chip memories

ï£§ On-chip memory and on-chip peripheral modules (excluding DMAC, BSC, UBC, cache-

memory, E-DMAC, and EtherC)

ï£§ On-chip memory and external memory

â¢ Transfer requests

ï£§ External request: from the DREQn pins. Edge or level detection, and active-low or active-

high mode, can be specified for DREQn.

ï£§ On-chip peripheral module requests: serial communication interface with FIFO (SCIF),

16-bit timer pulse unit (TPU), serial I/O with FIFO (SIOF), serial I/O (SIO)

ï£§ Auto-request: the transfer request is generated automatically within the DMAC

â¢ Choice of bus mode

ï£§ Cycle steal mode

ï£§ Burst mode

â¢ Choice of channel priority order

ï£§ Fixed mode

ï£§ Round robin mode

â¢ An interrupt request can be sent to the CPU on completion of data transfer

Rev. 2.00 Mar 09, 2006 page 462 of 906

REJ09B0292-0200

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