SH7616 Datasheet, PDF (37/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 1 Overview
Item
16-bit free-running
timer (FRT),
1 channel
Watchdog timer
(WDT), 1 channel
Clock pulse
generator (CPG)
Specifications
• Choice of four counter input clocks
 Three internal clocks (Pφ/8, Pφ/32, Pφ/128)
 External clock (enabling external event counting)
• Two independent comparators (allowing generation of two waveform
outputs)
• Input capture (choice of rising edge or falling edge)
• Counter clear specification
 Counter value can be cleared by compare match A
• Four interrupt sources
 Two compare match sources (OCIA, OCIB)
 One input capture source (ICI)
 One overflow source (OVI)
• Can be switched between watchdog timer mode and interval timer mode
• Internal reset, external signal (WDTOVF), or interrupt generated on count
overflow
• Used when standby mode is cleared or the clock frequency is changed,
and in clock pause mode
• Selection of eight counter input clocks
• Built-in clock pulse generator
• Selection of crystal or external clock as clock source
• Built-in clock-multiplication PLL circuits
• Built-in PLL circuit for phase synchronization between external clock and
internal clock
• CPU/DSP core clock (Iφ), peripheral module clock (Pφ), and external
interface clock (Eφ) frequencies can be scaled independently
Rev. 2.00 Mar 09, 2006 page 11 of 906
REJ09B0292-0200