SH7616 Datasheet, PDF (519/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 11 Direct Memory Access Controller (DMAC)
Relationship of Request Modes and Bus Modes by DMA Transfer Category: Table 11.8
shows the relationship between request modes, bus modes, etc., by DMA transfer category.
Table 11.8 Relationship of Request Modes and Bus Modes by DMA Transfer Category
Address
Mode Transfer Range
Request Mode^*3
Single
Between external memory and external
device with DACK
External
Between external device with DACK, and External
memory mapped external device
Dual
Between external memories
External
Automatic
Internal peripheral
module^*1
Between external memory and memory
mapped external device
External
Automatic
Internal peripheral
module^*1
Between memory mapped external devices External
Automatic
Internal peripheral
module^*1
Between external memory and internal
peripheral module
External
Automatic
Internal peripheral
module^*2
Between memory mapped external device External
and internal peripheral module
Automatic
Internal peripheral
module^*2
Between internal memories
Automatic
Between internal memory and memory
mapped external device*⁵
External
Automatic
Internal peripheral
module^*1
Bus Transfer
Mode^*7 Size (Byte)
B/C
1/2/4/16^*8
B/C
1/2/4/16^*8
B/C
1/2/4/16^*8
B/C 1/2/4/16
C
1/2/4
B/C
1/2/4/16^*8
B/C 1/2/4/16
C
1/2/4
B/C
1/2/4/16^*8
B/C 1/2/4/16
C
1/2/4
B/C
1/2/4^*4
B/C
1/2/4^*4
C
1/2/4^*4
B/C
1/2/4^*4
B/C
1/2/4^*4
C
1/2/4^*4
B/C 1/2/4/16
B/C
1/2/4/16^*8
B/C 1/2/4/16
C
1/2/4
Rev. 2.00 Mar 09, 2006 page 493 of 906
REJ09B0292-0200