SH7616 Datasheet, PDF (860/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 22 Electrical Characteristics
CKIO
Address
upper bits
Address
lower bits
BS
CSn
RD/WR
T_C
T_W
T_d1
T_d2
T_d3
T_d4
T_de
RD
WEn ⋅
DQMxx
D31–D0
t_DQMD
DACKn*
WAIT
RAS
CAS ⋅
OE
CKE
Note: * DACKn waveform when active-high is specified
Figure 22.19 Synchronous DRAM Read Bus Cycle
(Bank Active, Same Row Access, CAS Latency = 2 Cycles)
Rev. 2.00 Mar 09, 2006 page 834 of 906
REJ09B0292-0200