SH7616 Datasheet, PDF (721/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 17 16-Bit Timer Pulse Unit (TPU)
TIOR1
Channel
1
Bit 7: Bit 6: Bit 5: Bit 4:
IOB3 IOB2 IOB1 IOB0 Description
0
0
0
0
TGR1B is Output disabled
(Initial value)
1
output _{Initial output is 0 0 output at compare match}
1
0
compare _output
register
1 output at compare match
1
Toggle output at compare
match
1
0
0
Output disabled
1
1
0
Initial output is 1 0 output at compare match
output
1 output at compare match
1
Toggle output at compare
match
1
0
0
0
TGR1B is Capture input Input capture at rising edge
1
input
source is
Input capture at falling edge
1
*
capture TIOCB1 pin
register
Input capture at both edges
1
*
*
Setting prohibited
*: Don’t care
TIOR2
Channel
2
Bit 7: Bit 6: Bit 5: Bit 4:
IOB3 IOB2 IOB1 IOB0 Description
0
0
0
0
TGR2B is Output disabled
1
output _{Initial output is 0}
1
0
compare _output
register
1
1
0
0
1
1
0
1
Output disabled
Initial output is 1
output
1
*
0
0
TGR2B is Capture input
1
input
source is
1
*
capture TIOCB2 pin
register
(Initial value)
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
*: Don’t care
Rev. 2.00 Mar 09, 2006 page 695 of 906
REJ09B0292-0200