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SH7616 Datasheet, PDF (485/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
Section 10 Ethernet Controller Direct Memory Access Controller (E-DMAC)
10.3.4 Multi-Buffer Frame Transmit/Receive Processing
Multi-Buffer Frame Transmit Processing: If an error occurs during multi-buffer frame
transmission, the processing shown in figure 10.6 is carried out.
Where the transmit descriptor is shown as inactive (TACT bit = 0) in the figure, buffer data has
already been transmitted normally, and where the transmit descriptor is shown as active (TACT bit
= 1), buffer data has not been transmitted. If a frame transmit error occurs in the first descriptor
part where the transmit descriptor is active (TACT bit = 1), transmission is halted, and the TACT
bit cleared to 0, immediately. The next descriptor is then read, and the position within the transmit
frame is determined on the basis of bits TFP1 and TFP0 (continuing [00] or end [01]). In the case
of a continuing descriptor, the TACT bit is cleared to 0, only, and the next descriptor is read
immediately. If the descriptor is the final descriptor, not only is the TACT bit cleared to 0, but
write-back is also performed to the TFE and TFS bits at the same time. Data in the buffer is not
transmitted between the occurrence of an error and write-back to the final descriptor. If error
interrupts are enabled in the EtherC/E-DMAC status interrupt permission register (EESIPR), an
interrupt is generated immediately after the final descriptor write-back.
Descriptors
E-DMAC
Inactivates TACT (changes 1 to 0)
Descriptor read
Inactivates TACT
Descriptor read
Inactivates TACT
Descriptor read
Inactivates TACT
Descriptor read
Inactivates TACT and writes TFE, TFS
00 10
00 00
00 00
10 00
10 00
10 00
10 00
10 01
11 10
Untransmitted
data is not
transmitted
after error
occurrence.
Descriptor
Transmit error occurrence
One frame
Buffer
Figure 10.6 E-DMAC Operation after Transmit Error
Transmitted data
Untransmitted data
Multi-Buffer Frame Receive Processing: If an error occurs during multi-buffer frame reception,
the processing shown in figure 10.7 is carried out.
Where the receive descriptor is shown as inactive (RACT bit = 0) in the figure, buffer data has
already been received normally, and where the receive descriptor is shown as active (RACT bit =
Rev. 2.00 Mar 09, 2006 page 459 of 906
REJ09B0292-0200