SH7616 Datasheet, PDF (664/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 15 Serial I/O with FIFO (SIOF)
16bits
Peripheral bus
SIRDR
SIRCDR
MSB/LSB
Conversion circuit
SIRSR
SISTR
SICTR
SIFCR
SIFDR
Bit counter
I/O control unit
SITDR
SITCDR
selector
MSB/LSB
Conversion circuit
SITSR
Serial I/O with
FIFO module (SIOF)
SRXD
SRCK SRS STS STCK
STXD
SIRDR: Receive data register
SIRCDR: Receive control data register
SIRSR: Receive shift register
SITDR: Transmit data register
SITCDR: Transmit control data register
SITSR: Transmit shift register
SISTR: Serial status register
SICTR: Serial control register
SIFCR: FIFO control register
SIFDR: FIFO data count register
Figure 15.1 SIOF Block Diagram
Table 15.1 shows the functions of the external pins.
Table 15.1 Serial I/O with FIFO (SIOF) External Pins
Name
Pin
Serial receive data input pin
SRxD0
Serial receive clock input pin
SRCK0
Serial reception synchronization
input pin
SRS0
Serial transmit data output pin
STxD0
Serial transmit clock input pin
STCK0
Serial transmission synchronization STS0
input/output pin
I/O
Input
Input
Input
Output
Input
I/O
Function
Serial data input port
Serial receive clock port
Serial reception synchronization input
port
Serial data output port
Serial transmit clock port
Serial transmission synchronization
input/output port
Rev. 2.00 Mar 09, 2006 page 638 of 906
REJ09B0292-0200