SH7616 Datasheet, PDF (213/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 5 Interrupt Controller (INTC)
5.3.28 Interrupt Control Register (ICR)
ICR is a 16-bit register that sets the input signal detection mode of external interrupt input pin
NMI and indicates the input signal level at the NMI pin. It can also specify IRQ or IRL mode by
means of the External Interrupt Vector Mode Select bit. The IRQ/IRL interrupt vector number can
be selected for setting in accordance with either auto vector mode or external vector mode by
means of the Interrupt Vector Mode Select bit. ICR is initialized to H'8000 or H'0000 by a reset. It
is not initialized in standby mode.
Bit: 15
14
13
12
11
10
9
8
NMIL
—
—
—
—
—
—
NMIE
Initial value: 0/1^*
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R/W
Bit: 7
6
5
4
3
—
—
—
—
—
Initial value: 0
0
0
0
0
R/W: R
R
R
R
R
Note: * When NMI input is high: 1; when NMI input is low: 0
2
1
0
— EXIMD VECMD
0
0
0
R
R/W
R/W
Bit 15—NMI Input Level (NMIL): Sets the level of the signal input at the NMI pin. This bit can
be read to determine the NMI pin level. This bit cannot be modified.
Bit 15: NMIL
0
1
Description
NMI input level is low
NMI input level is high
Bits 14 to 9—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 8—NMI Edge Select (NMIE): Selects whether the falling or rising edge of the interrupt
request signal to the NMI pin is detected.
Bit 8: NMIE
0
1
Description
Interrupt request is detected on falling edge of NMI input (Initial value)
Interrupt request is detected on rising edge of NMI input
Bits 7 to 2—Reserved: These bits are always read as 0. The write value should always be 0.
Rev. 2.00 Mar 09, 2006 page 187 of 906
REJ09B0292-0200