SH7616 Datasheet, PDF (206/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 5 Interrupt Controller (INTC)
5.3.23 Vector Number Setting Register Q (VCRQ)
Vector number setting register Q (VCRQ) is a 16-bit read/write register that sets the serial I/O
with FIFO (SIOF) receive-data-full interrupt and transmit-data-empty interrupt vector numbers (0–
127).
VCRQ is initialized to H'0000 by a reset. It is not initialized in standby mode.
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9
8
— RDF0V6 RDF0V5 RDF0V4 RDF0V3 RDF0V2 RDF0V1 RDF0V0
0
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W R/W
Bit:
Initial value:
R/W:
7
6
5
4
3
2
1
0
— TDE0V6 TDE0V5 TDE0V4 TDE0V3 TDE0V2 TDE0V1 TDE0V0
0
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W R/W
Bits 15 and 7—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 14 to 8—Serial I/O with FIFO (SIOF) Receive-Data-Full Interrupt Vector Number 6 to 0
(RDF0V6–RDF0V0): These bits set the vector number for the serial I/O with FIFO (SIOF)
receive-data-full interrupt. There are seven bits, so the value can be set between 0 and 127.
Bits 6 to 0—Serial I/O with FIFO (SIOF) Transmit-Data-Empty Interrupt Vector Number 6 to 0
(TDE0V6–TDE0V0): These bits set the vector number for the serial I/O with FIFO (SIOF)
transmit-data-empty interrupt. There are seven bits, so the value can be set between 0 and 127.
Rev. 2.00 Mar 09, 2006 page 180 of 906
REJ09B0292-0200