SH7616 Datasheet, PDF (25/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

20.2.1 Register Configuration......................................................................................... 796
20.2.2 Port A Data Register (PADR) .............................................................................. 796
20.3 Port B ................................................................................................................................ 797
20.3.1 Register Configuration......................................................................................... 797
20.3.2 Port B Data Register (PBDR) .............................................................................. 798
Section 21 Power-Down Modes...................................................................................... 799
21.1 Overview........................................................................................................................... 799
21.1.1 Power-Down Modes ............................................................................................ 799
21.1.2 Register ................................................................................................................ 800
21.2 Register Descriptions ........................................................................................................ 801
21.2.1 Standby Control Register 1 (SBYCR1) ............................................................... 801
21.2.2 Standby Control Register 2 (SBYCR2) ............................................................... 803
21.3 Sleep Mode ....................................................................................................................... 805
21.3.1 Transition to Sleep Mode..................................................................................... 805
21.3.2 Canceling Sleep Mode ......................................................................................... 805
21.4 Standby Mode ................................................................................................................... 805
21.4.1 Transition to Standby Mode................................................................................. 805
21.4.2 Canceling Standby Mode ..................................................................................... 807
21.4.3 Standby Mode Cancellation by NMI Interrupt..................................................... 807
21.4.4 Clock Pause Function........................................................................................... 808
21.4.5 Notes on Standby Mode....................................................................................... 811
21.5 Module Standby Function ................................................................................................. 812
21.5.1 Transition to Module Standby Function............................................................... 812
21.5.2 Clearing the Module Standby Function ............................................................... 812
Section 22 Electrical Characteristics.............................................................................. 813
22.1 Absolute Maximum Ratings.............................................................................................. 813
22.2 DC Characteristics ............................................................................................................ 814
22.3 AC Characteristics ............................................................................................................ 816
22.3.1 Clock Timing ....................................................................................................... 817
22.3.2 Control Signal Timing ......................................................................................... 821
22.3.3 Bus Timing........................................................................................................... 823
22.3.4 Direct Memory Access Controller Timing........................................................... 861
22.3.5 Free-Running Timer Timing ................................................................................ 862
22.3.6 Serial Communication Interface Timing.............................................................. 864
22.3.7 Watchdog Timer Timing...................................................................................... 868
22.3.8 Serial I/O with FIFO / Serial I/O Timing............................................................. 869
22.3.9 User Debug Interface Timing............................................................................... 872
22.3.10 I/O Port Timing.................................................................................................... 873
Rev. 2.00 Mar 09, 2006 page xxv of xxvi