HD6417751 Datasheet, PDF (942/1105 Pages) Renesas Technology Corp – SuperH RISC engine

PCICLK
AD31–AD0
PAR
C/ –C/
Addr
D0 D1
AP
DP0
Com
BE0 BE1
Dn
DPn-1 DPn
BEn
IDSEL
/
/
Addr: PCI space address
Dn: nth data
AP: Address parity
DPn: nth data parity
Com: Command
BEn: nth data byte enable
Figure 22.10 Master Memory Read Cycle in Non-Host Mode (Burst)
Rev. 3.0, 04/02, page 902 of 1064