HD6417751 Datasheet, PDF (758/1105 Pages) Renesas Technology Corp – SuperH RISC engine

18.1.4 Register Configuration
The 32-bit general-purpose I/O port, SCI I/O port, and SCIF I/O port have seven registers, as
shown in table 18.4.
Table 18.4 I/O Port Registers
Name
Area 7
Abbreviation R/W Initial Value* P4 Address Address
Access
Size
Port control register A PCTRA
R/W H'00000000 H'FF80002C H'1F80002C 32
Port data register A PDTRA
R/W Undefined H'FF800030 H'1F800030 16
Port control register B PCTRB
R/W H'00000000 H'FF800040 H'1F800040 32
Port data register B PDTRB
R/W Undefined H'FF800044 H'1F800044 16
GPIO interrupt control GPIOIC
register
R/W H'00000000 H'FF800048 H'1F800048 16
Serial port register
SCSPTR1 R/W Undefined H'FFE0001C H'1FE0001C 8
Serial port register
SCSPTR2 R/W Undefined H'FFE80020 H'1FE80020 16
Note: * Initialized by a power-on reset.
Rev. 3.0, 04/02, page 718 of 1064