HD6417751 Datasheet, PDF (927/1105 Pages) Renesas Technology Corp – SuperH RISC engine

H'FD000000
H'FDFFFFFF
PCI memory
space
16 Mbytes
31 24 23
0
PCI memory
space address
H'FD
31 24 23
0
PIOMBR
31 24 23
20
00
PCI address
LOCK identifier
Figure 22.2 PIO Memory Space Access
I/O Transfers: This section describes how to access I/O space using PIO transfers. The 256kB
from H'FE240000 to H'FE27FFFF of area P4 (H'1E240000 to H'1E27FFFF in area 7) is allocated
as PCI I/O address space. This space is used for the least significant 18 bits of the PCI address.
The most significant 14 bits (IOBR [31:18]) of the I/O space base register (PCIIOBR) are used as
the most significant 14 bits of the PCI address. These two addresses are combined to specify the
32-bit PCI address.
For transfers to the I/O space, first specify the most significant 14 bits of the PCI address in
PCIIOBR, then access the PCI I/O address space. If within the 256kB space, you can access the
PCI I/O address space consecutively simply by setting the PCIIOBR once. If it is necessary to
access another address space beyond 256kB, set PCIIOBR again.
When performing locked transfers in I/O transfers, set the I/O space lock specification bit (LOCK)
in the PCIIOBR. The I/O space is locked while the LOCK bit is set. The same precautions apply
to LOCK I/O transfers as to LOCK memory transfers.
Rev. 3.0, 04/02, page 887 of 1064