HD6417751 Datasheet, PDF (873/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Bits 23 to 16—Minimum Latency Specification (MGNT 7 to 0): Specify the burst interval
required by the PCI device (not supported).
Bits 15 to 8—Interrupt Pin Specification (IPIN7 to 0)
Bits 15 to 8:
IPIN7 to 0
H'01
H'02
H'03
H'04
H'05 to H'FF
Description
,17$ used
,17% used
,17& used
,17' used
Reserved bits
(Initial value)
Bits 7 to 0—Interrupt Line Specification (ILIN7 to 0): Specifies an interrupt line of a system to
which interrupt output used by the PCIC is connected.
Rev. 3.0, 04/02, page 833 of 1064