HD6417751 Datasheet, PDF (650/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Note:
Even when this LSI has received data with a 0 multiprocessor bit that was meant to be sent
to another station, the RDRF flag in SCSSR1 is set to 1. When the RDRF flag in SCSSR1
is set to 1, the exception handling routine reads the MPIE bit in SCSCR1, and skips the
receive data if the MPIE bit is 1. Skipping of unnecessary data is achieved by
collaborative operation with the exception handling routine.
Transmitting
station
Receiving
station A
(ID = 01)
Serial transmission line
Receiving
station B
(ID = 02)
Receiving
station C
(ID = 03)
Receiving
station D
(ID = 04)
Serial
data
H'01
(MPB = 1)
H'AA
(MPB = 0)
ID transmission cycle:
Receiving station
specification
MPB: Multiprocessor bit
Data transmission cycle:
Data transmission to
receiving station specified
by ID
Figure 15.12 Example of Inter-Processor Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A)
Rev. 3.0, 04/02, page 610 of 1064