HD6417751 Datasheet, PDF (698/1105 Pages) Renesas Technology Corp – SuperH RISC engine

SCIF I/O port block diagrams are shown in figures 16.2 to 16.6.
MD8/RTS2
Mode setting
register
Reset
R
Q
D
D7
RTSIO
C
SPTRW
Reset
R
D6
QD
RTSDT
C
SPTRW
Internal data bus
SCIF
Modem control
enable signal*
RTS2 signal
SPTRR
SPTRW: Write to SPTR
SPTRR: Read SPTR
Note: * The RTS2 pin function is designated as modem control by the MCE bit in SCFCR2.
Figure 16.2 MD8/RTS2 Pin
Rev. 3.0, 04/02, page 658 of 1064