HD6417751 Datasheet, PDF (870/1105 Pages) Renesas Technology Corp – SuperH RISC engine

22.2.11 PCI Configuration Register 13 (PCICONF13)
Bit: 31
30
29
...
11
10
9
8
—
—
—
...
—
—
—
—
Initial value: 0
0
0
...
0
0
0
0
PCI-R/W: R
R
R
...
R
R
R
R
PP Bus-R/W: R
R
R
...
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
CAPPTR7 CAPPTR6 CAPPTR5 CAPPTR4 CAPPTR3 CAPPTR2 CAPPTR1 CAPPTR0
Initial value: 0
1
0
0
0
0
0
0
PCI-R/W: R
R
R
R
R
R
R
R
PP Bus-R/W: R
R
R
R
R
R
R
R
The PCI configuration register 13 (PCICONF13) is a 32-bit read-only register that accommodates
the extended function pointer PCI configuration register stipulated in the PCI power management
specifications. The address offset of the extended function is read from bits 7 to 0.
All bits are fixed in hardware.
Bits 31 to 8—Reserved: These bits are always read as 0.
Bits 7 to 0—CAPPTR: These bits specify the address offset of the extended functions (power
management). The initial value is H'40 (fixed).
Rev. 3.0, 04/02, page 830 of 1064