HD6417751 Datasheet, PDF (898/1105 Pages) Renesas Technology Corp – SuperH RISC engine

22.2.28 PCI DMA Transfer PCI Address Register [3:0] (PCIDPA [3:0])
Bit: 31
30
29
28
27
26
25
24
PDPA31 PDPA30 PDPA29 PDPA28 PDPA27 PDPA26 PDPA25 PDPA24
Initial value: 0
0
0
0
0
0
0
0
PCI-R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PP Bus-R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit: 23
22
21
20
19
18
17
16
PDPA23 PDPA22 PDPA21 PDPA20 PDPA19 PDPA18 PDPA17 PDPA16
Initial value: 0
0
0
0
0
0
0
0
PCI-R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PP Bus-R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit: 15
14
13
12
11
10
9
PDPA15 PDPA14 PDPA13 PDPA12 PDPA11 PDPA10 PDPA9
Initial value: 0
0
0
0
0
0
0
PCI-R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
PP Bus-R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
8
PDPA8
0
R/W
R/W
Bit:
Initial value:
PCI-R/W:
PP Bus-R/W:
7
PDPA7
0
R/W
R/W
6
PDPA6
0
R/W
R/W
5
PDPA5
0
R/W
R/W
4
PDPA4
0
R/W
R/W
3
PDPA3
0
R/W
R/W
2
PDPA2
0
R/W
R/W
1
PDPA1
0
R/W
R/W
0
PDPA0
0
R/W
R/W
The DMA transfer PCI address register [3:0] (PCIDPA [3:0]) specifies the starting address at the
PCI when performing DMA transfers. This 32-bit read/write register can be accessed from both
the PP bus and PCI bus.
The PCIINTM register is initialized to H'00000000 at a power-on reset and a software reset.
The transfer address of a byte boundary or character boundary can be set, but the 2 least
significant bits of this register are ignored, and the data of the longword boundary is transferred.
Before starting a DMA transfer, be sure to write to this register. After a DMA transfer starts, the
value in the register is not retained. Always re-set the register value before starting a new DMA
transfer after a DMA transfer has been completed.
Rev. 3.0, 04/02, page 858 of 1064