HD6417751 Datasheet, PDF (1087/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Table D.3 Pin States in Reset, Power-Down State, and Bus-Released State (PCI Disable)
Pin Name
Reset
(Power-On)
Reset
(Manual)
Hard-
Bus
ware
I/O Master Slave Master Slave Standby Released Standby Notes
AD31–AD0
I/O Z
Z
Z
Z
Z*¹⁷
Z*¹⁷
Z
(K)
(K) (K)
(K)
Values
in paren-
thesis
are
when
using
PORT
– &%( &%(
—
Z
Z
Z
Z
Z
Z
Z
PAR
O
Z
Z
Z
Z
Z
Z
Z
6(55
—
Z
Z
Z
Z
Z
Z
Z
3(55
—
Z
Z
Z
Z
Z
Z
Z
3&,/2&.
—
Z
Z
Z
Z
Z
Z
Z
3&,6723
—
Z
Z
Z
Z
Z
Z
Z
'(96(/
—
Z
Z
Z
Z
Z
Z
Z
75'<
—
Z
Z
Z
Z
Z
Z
Z
,5'<
—
Z
Z
Z
Z
Z
Z
Z
3&,)5$0(
—
Z
Z
Z
Z
Z
Z
Z
– 3&,5(4 3&,5(4
—
Z
Z
Z
Z
Z
Z
Z
3&,5(4
—
Z
Z
Z
Z
Z
Z
Z
– 3&,*17 3&,*17
O
Z
Z
Z
Z
Z
Z
Z
3&,*17
O
Z
Z
Z
Z
Z
Z
Z
PCICLK
—
Z
Z
Z
Z
Z
Z
Z
3&,567
O
Z
Z
Z
Z
Z
Z
Z
IDSEL
—
Z
Z
Z
Z
Z
Z
Z
,17$
—
Z
Z
Z
Z
Z
Z
Z
Notes: I:
Input
O:
Output
H:
High-level output
L:
Low-level output
Z:
High-impedance
K:
Output state held
IZ/IOZ: Response to access from PCI
PZ: Pulled up with a built-in pull-up resistance
PI: Input pulled up with a built-in pull-up resistance
ODK: Open-drain output state held
Rev. 3.0, 04/02, page 1047 of 1064