HD6417751 Datasheet, PDF (474/1105 Pages) Renesas Technology Corp – SuperH RISC engine

SH7751 Series
CKIO
RD/
D31–D0
MPX device
CLK
I/O31–I/O0
Figure 13.51 Example of 32-Bit Data Width MPX Connection
The MPX interface timing is shown below.
When the MPX interface is used for areas 1 to 6, a bus size of 32 bit should be specified in BCR2.
For wait control, waits specified by WCR2 and wait insertion by means of the 5'< pin can be
used.
In a read, one wait cycle is automatically inserted after address output, even if WCR2 is cleared to
0.
Rev. 3.0, 04/02, page 434 of 1064