HD6417751 Datasheet, PDF (718/1105 Pages) Renesas Technology Corp – SuperH RISC engine

From equation (1), if F = 0 and D = 0.5, the receive margin is 46.875%, as given by equation (2).
When D = 0.5 and F = 0:
M = (0.5 – 1 / (2 × 16) ) × 100% = 46.875% ............................................. (2)
This is a theoretical value. A reasonable margin to allow in system designs is 20% to 30%.
When Using the DMAC: When using the DMAC for transmission/reception, inhibit output of
RXI and TXI interrupt requests to the interrupt controller. If interrupt request output is enabled,
interrupt requests to the interrupt controller will be cleared by the DMAC without regard to the
interrupt handler.
Serial Ports: Note that, when the SCIF pin value is read using a serial port, the value read will be
the value two peripheral clock cycles earlier.
Rev. 3.0, 04/02, page 678 of 1064