HD6417751 Datasheet, PDF (225/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Table 7.12 Floating-Point Graphics Acceleration Instructions
Instruction
FMOV DRm,XDn
FMOV XDm,DRn
FMOV XDm,XDn
FMOV @Rm,XDn
FMOV @Rm+,XDn
FMOV @(R0,Rm),XDn
FMOV XDm,@Rn
FMOV XDm,@-Rn
FMOV XDm,@(R0,Rn)
FIPR FVm,FVn
FTRV XMTRX,FVn
FRCHG
FSCHG
Operation
Instruction Code
Privileged
DRm → XDn
1111nnn1mmm01100 —
XDm → DRn
1111nnn0mmm11100 —
XDm → XDn
1111nnn1mmm11100 —
(Rm) → XDn
1111nnn1mmmm1000 —
(Rm) → XDn, Rm + 8 → Rm 1111nnn1mmmm1001 —
(R0 + Rm) → XDn
1111nnn1mmmm0110 —
XDm → (Rn)
1111nnnnmmm11010 —
Rn – 8 → Rn, XDm → (Rn)
1111nnnnmmm11011 —
XDm → (R0+Rn)
1111nnnnmmm10111 —
inner_product [FVm, FVn] →
FR[n+3]
1111nnmm11101101 —
transform_vector [XMTRX, FVn] 1111nn0111111101 —
→ FVn
~FPSCR.FR → SPFCR.FR 1111101111111101 —
~FPSCR.SZ → SPFCR.SZ 1111001111111101 —
T Bit
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Rev. 3.0, 04/02, page 185 of 1064