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| HD6417751 Datasheet, PDF (595/1105 Pages) Renesas Technology Corp – SuperH RISC engine | |||
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14.7 Register Descriptions (SH7751R)
14.7.1 DMA Source Address Registers 0â7 (SAR0âSAR7)
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Initial value: â â â â â â â â â â â â â â â â
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value: â â â â â â â â â â â â â â â â
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
DMA source address registers 0â7 (SAR0âSAR7) are 32-bit readable/writable registers that
specify the source address for a DMA transfer. The functions of these registers are the same as on
the SH7751. For more information, see section 14.2.1, DMA Source Address Registers 0â3
(SAR0âSAR3).
14.7.2 DMA Destination Address Registers 0â7 (DAR0âDAR7)
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Initial value: â â â â â â â â â â â â â â â â
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value: â â â â â â â â â â â â â â â â
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
DMA destination address registers 0â7 (DAR0âDAR7) are 32-bit readable/writable registers that
specify the destination address for a DMA transfer. The functions of these registers are the same
as on the SH7751. For more information, see section 14.2.2, DMA Destination Address Registers
0â3 (DAR0âDAR3).
Rev. 3.0, 04/02, page 555 of 1064
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