HD6417751 Datasheet, PDF (724/1105 Pages) Renesas Technology Corp – SuperH RISC engine

17.2.3 Serial Control Register (SCSCR1)
Bits 1 and 0 of SCSCR1 have a different function in smart card interface mode.
Bit: 7
6
5
4
3
2
1
TIE
RIE
TE
RE
—
—
CKE1
Initial value: 0
0
0
0
0
0
0
R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
CKE0
0
R/W
Bits 7 to 4: Operate in the same way as for the normal SCI. See section 15, Serial Communication
Interface (SCI), for details.
Bits 3 and 2: Not used with the smart card interface.
Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): These bits specify the function of the SCK
pin. In smart card interface mode, an internal clock is always used as the clock source. In smart
card interface mode, it is possible to specify a fixed high level or fixed low level for the clock
output, in addition to the usual switching between enabling and disabling of the clock output.
GM
CKE1
CKE0
SCK Pin Function
0
0
0
Port I/O pin
1
Clock output as SCK output pin
1
0
Invalid setting: must not be used
1
Invalid setting: must not be used
1
0
0
Output pin with output fixed low
1
Clock output as output pin
1
0
Output pin with output fixed high
1
Clock output as output pin
Rev. 3.0, 04/02, page 684 of 1064