HD6417751 Datasheet, PDF (1017/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Figure 23.22 Synchronous DRAM Auto-Precharge Read Bus Cycle: Burst
(RCD [1:0] = 01, CAS Latency = 3, TPC [2:0] = 011)
Rev. 3.0, 04/02, page 977 of 1064