HD6417751 Datasheet, PDF (395/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Bits 15 to 8—Reserved: These bits are always read as 0. For the write values, see section 13.2.15,
Notes on Accessing Refresh Control Registers.
Bit 7—Compare-Match Flag (CMF): Status flag that indicates a match between the refresh
timer counter (RTCNT) and refresh time constant register (RTCOR) values.
Bit 7: CMF
Description
0
RTCNT and RTCOR values do not match
[Clearing condition]
When 0 is written to CMF
1
RTCNT and RTCOR values match
[Setting condition]
When RTCNT = RTCOR*
Note: * If 1 is written, the original value is retained.
(Initial value)
Bit 6—Compare-Match Interrupt Enable (CMIE): Controls generation or suppression of an
interrupt request when the CMF flag is set to 1 in RTCSR. Do not set this bit to 1 when CAS-
before-RAS refreshing or auto-refreshing is used.
Bit 6: CMIE
0
1
Description
Interrupt requests initiated by CMF are disabled
Interrupt requests initiated by CMF are enabled
(Initial value)
Bits 5 to 3—Clock Select Bits (CKS2–CKS0): These bits select the input clock for RTCNT. The
base clock is the external bus clock (CKIO). The RTCNT count clock is obtained by scaling CKIO
by the specified factor.
Bit 5: CKS2
0
1
Bit 4: CKS1
0
1
0
1
Bit 3: CKS0
0
1
0
1
0
1
0
1
Description
Clock input disabled
Bus clock (CKIO)/4
CKIO/16
CKIO/64
CKIO/256
CKIO/1024
CKIO/2048
CKIO/4096
(Initial value)
Rev. 3.0, 04/02, page 355 of 1064