HD6417751 Datasheet, PDF (270/1105 Pages) Renesas Technology Corp – SuperH RISC engine

9.8.3 Usage Notes
The CA pin level must be kept high during the power-on oscillation settling period when the RTC
power supply is started (figure 9.15).
9.9 STATUS Pin Change Timing
The STATUS1 and STATUS0 pin change timing is shown below.
The meaning of the STATUS pin settings is as follows:
Reset:
Sleep:
Standby:
Normal:
HH (STATUS1 high, STATUS0 high)
HL (STATUS1 high, STATUS0 low)
LH (STATUS1 low, STATUS0 high)
LL (STATUS1 low, STATUS0 low)
The meaning of the clock units is as follows:
Bcyc: Bus clock cycle
Pcyc: Peripheral clock cycle
9.9.1 In Reset
Power-On Reset
CKIO
PLL stabilization
time
STATUS
Normal
Reset
0–5 Bcyc
0–30 Bcyc
Figure 9.1 STATUS Output in Power-On Reset
Normal
Rev. 3.0, 04/02, page 230 of 1064