HD6417751 Datasheet, PDF (1018/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Figure 23.23 Synchronous DRAM Normal Read Bus Cycle: ACT + READ Commands,
Burst (RCD [1:0] = 01, CAS Latency = 3)
Rev. 3.0, 04/02, page 978 of 1064