HD6417751 Datasheet, PDF (1022/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Figure 23.27 Synchronous DRAM Auto-Precharge Write Bus Cycle: Burst
(RCD [1:0] = 01, TPC [2:0] = 001, TRWL [2:0] = 010)
Rev. 3.0, 04/02, page 982 of 1064