HD6417751 Datasheet, PDF (328/1105 Pages) Renesas Technology Corp – SuperH RISC engine

12.1.2 Block Diagram
Figure 12.1 shows a block diagram of the TMU.
RESET, STBY, TUNI0,1 PCLK/4, 16, 64*
etc.
TICPI2
TUNI2 TCLK RTCCLK
TUNI3, TUNI4
TMU
operation
control unit
Prescaler
To chan- To chan-
nels
nels
0 to 4 0 to 2
TCLK
control unit
TOCR
Ch 0,1
Counter unit
Interrupt
control unit
Ch 2
Counter unit
Interrupt
control unit
Ch 3,4
Counter unit
TSTR
TSTR2
Interrupt
control unit
TCR TCOR TCNT TCR2 TCOR2 TCNT2 TCPR2 TCR TCOR TCNT
Bus interface
Internal peripheral module bus
Note: * Signals with 1/4, 1/16, and 1/64 the Pφ frequency, supplied to the on-chip peripheral functions.
Figure 12.1 Block Diagram of TMU
12.1.3 Pin Configuration
Table 12.1 shows the TMU pins.
Table 12.1 TMU Pins
Pin Name
Abbreviation
I/O
Clock input/clock output TCLK
I/O
Function
External clock input pin/input capture
control input pin/RTC output pin
(shared with RTC)
Rev. 3.0, 04/02, page 288 of 1064