HD6417751 Datasheet, PDF (825/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Table 21.3 Structure of Boundary Scan Register (cont)
No.
Pin name
Type
389
AUDATA0
CTL
388
AUDATA0
OUT
387
AUDCK
CTL
386
AUDCK
OUT
385
AUDSYNC
CTL
384
AUDSYNC
OUT
383
MD7/&76
IN
382
MD7/&76
CTL
381
MD7/&76
OUT
380
MD0/SCK2
IN
379
MD0/SCK2
CTL
378
MD0/SCK2
OUT
377
MD1/TXD2
IN
376
MD1/TXD2
CTL
375
MD1/TXD2
OUT
374
SCK
IN
373
SCK
CTL
372
SCK
OUT
371
576/MD8
IN
370
576/MD8
CTL
369
576/MD8
OUT
368
TCLK
IN
367
TCLK
CTL
366
TCLK
OUT
365
RXD
IN
364
MD2/RXD2
IN
363
TXD
IN
362
TXD
CTL
361
TXD
OUT
360
5'<
IN
Note: CTL is a low-active signal. The relevant pin is driven to the OUT state when CTL is set
LOW.
Rev. 3.0, 04/02, page 785 of 1064