HD6417751 Datasheet, PDF (799/1105 Pages) Renesas Technology Corp – SuperH RISC engine

20.2.6 Break Address Register B (BARB)
BARB is the channel B break address register. The bit configuration is the same as for BARA.
20.2.7 Break ASID Register B (BASRB)
BASRB is the channel B break ASID register. The bit configuration is the same as for BASRA.
20.2.8 Break Address Mask Register B (BAMRB)
BAMRB is the channel B break address mask register. The bit configuration is the same as for
BAMRA.
20.2.9 Break Data Register B (BDRB)
Bit:
Initial value:
R/W:
31
BDB31
*
R/W
30
BDB30
*
R/W
29
BDB29
*
R/W
28
BDB28
*
R/W
27
BDB27
*
R/W
26
BDB26
*
R/W
25
BDB25
*
R/W
24
BDB24
*
R/W
Bit:
Initial value:
R/W:
23
BDB23
*
R/W
22
BDB22
*
R/W
21
BDB21
*
R/W
20
BDB20
*
R/W
19
BDB19
*
R/W
18
BDB18
*
R/W
17
BDB17
*
R/W
16
BDB16
*
R/W
Bit:
Initial value:
R/W:
15
BDB15
*
R/W
14
BDB14
*
R/W
13
BDB13
*
R/W
12
BDB12
*
R/W
11
BDB11
*
R/W
10
BDB10
*
R/W
9
BDB9
*
R/W
8
BDB8
*
R/W
Bit: 7
BDB7
Initial value:
*
R/W: R/W
Note: *: Undefined
6
BDB6
*
R/W
5
BDB5
*
R/W
4
BDB4
*
R/W
3
BDB3
*
R/W
2
BDB2
*
R/W
1
BDB1
*
R/W
0
BDB0
*
R/W
Break data register B (BDRB) is a 32-bit readable/writable register that specifies the data (bits 31–
0) to be used in the channel B break conditions. BDRB is not initialized by a power-on reset or
manual reset.
Rev. 3.0, 04/02, page 759 of 1064