HD6417751 Datasheet, PDF (354/1105 Pages) Renesas Technology Corp – SuperH RISC engine

For details, see section 13.2.2, Bus Control Register 2 (BCR2), and section 13.2.8, Memory
Control Register (MCR).
The area 7 address range, H'1C000000 to H'1FFFFFFFF, is a reserved space and must not be used.
13.1.6 PCMCIA Support
The SH7751 Series supports PCMCIA interface specifications for external memory space areas 5
and 6.
The interfaces supported are the IC memory card interface and I/O card interface stipulated in
JEIDA specifications version 4.2 (PCMCIA2.1).
External memory space areas 5 and 6 support both the IC memory card interface and the I/O card
interface.
The PCMCIA interface is supported only in little-endian mode.
Table 13.4 PCMCIA Interface Features
Item
Access
Data bus
Memory type
Common memory capacity
Attribute memory capacity
Others
Features
Random access
8/16 bits
Mask ROM, OTPROM, EPROM, EEPROM, flash memory, SRAM
Max. 64 Mbytes
Max. 64 Mbytes
Dynamic bus sizing for I/O bus width, access to PCMCIA interface
from address translation areas
Rev. 3.0, 04/02, page 314 of 1064