HD6417751 Datasheet, PDF (340/1105 Pages) Renesas Technology Corp – SuperH RISC engine

TCNT Count Timing:
• Operating on internal clock
Any of five count clocks (Pφ/4, Pφ/16, Pφ/64, Pφ/256, or Pφ/1024) scaled from the peripheral
module clock can be selected as the count clock by means of the TPSC2–TPSC0 bits in TCR.
Figure 12.4 shows the timing in this case.
Pφ
Internal clock
TCNT
N+1
N
N–1
Figure 12.4 Count Timing when Operating on Internal Clock
• Operating on external clock
In channels 0 to 2, external clock pin (TCLK) input can be selected as the timer clock by
means of the TPSC2–TPSC0 bits in TCR. The detected edge (rising, falling, or both edges)
can be selected with the CKEG1 and CKEG0 bits in TCR.
Figure 12.5 shows the timing for both-edge detection.
Pφ
External clock
input pin
TCNT
N+1
N
N–1
Figure 12.5 Count Timing when Operating on External Clock
• Operating on on-chip RTC output clock
In channels 0 to 2, the on-chip RTC output clock can be selected as the timer clock by means
of the TPSC2–TPSC0 bits in TCR. Figure 12.6 shows the timing in this case.
Rev. 3.0, 04/02, page 300 of 1064