HD6417751 Datasheet, PDF (704/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Table 16.4 SCSCR2 Settings for SCIF Clock Source Selection
SCSCR2 Setting
Bit 1: CKE1 Bit 0: CKE0
0
0
1
1
0
1
Mode
Asynchronous
mode
SCIF Transmit/Receive Clock
Clock Source SCK2 Pin Function
Internal
SCIF does not use
SCK2 pin
Output clock with
frequency of 16 times
the bit rate
External
Inputs clock with
frequency of 16 times
the bit rate
16.3.2 Serial Operation
Data Transfer Format
Table 16.5 shows the data transfer formats that can be used. Any of 8 transfer formats can be
selected according to the SCSMR2 settings.
Rev. 3.0, 04/02, page 664 of 1064