 English |
|
|
|
|
|
|
|
| HD6417751 Datasheet, PDF (1028/1105 Pages) Renesas Technology Corp – SuperH RISC engine | |||
| |||
| ◁ |
CKIO
Bank
TRs1
TRs2
TRs3
TRs4
tAD
Precharge-sel
Address
tCSD
tCSD
tCSD
tRWD
RD/
tRASD
tRASD
tRASD
tCASD2
tCASD2
tCASD2
TRs5
Trc
Trc
Trc
tAD
tRWD
tCASD2
tCSD
tRASD
DQMn
D31âD0
(write)
CKE
DACKn
tDQMD
tWDD
tCKED
tDACD
tWDD
tBSD
tCKED
tDQMD
tDACD
Notes: IO: DACK device
SA: Single address DMA transfer
DA: Dual address DMA transfer
DACK set to active-high
Figure 23.33 Synchronous DRAM Bus Cycle: Self-Refresh (TRC [2:0] = 001)
Rev. 3.0, 04/02, page 988 of 1064
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese