HD6417751 Datasheet, PDF (665/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Transfer
direction
Serial clock
Serial data
Bit 7 Bit 0
Bit 7 Bit 0 Bit 1
Bit 6 Bit 7
RDRF
ORER
RXI interrupt
request
Data read from
SCRDR1 and RDRF
flag cleared to 0 in RXI
interrupt handler
RXI interrupt
request
One frame
ERI interrupt
request due to
overrun error
Figure 15.22 Example of SCI Receive Operation
Simultaneous Serial Data Transmission and Reception (Synchronous Mode): Figure 15.23
shows a sample flowchart for simultaneous serial transmit and receive operations.
Use the following procedure for simultaneous serial data transmit and receive operations after
enabling the SCI for transmission and reception.
Rev. 3.0, 04/02, page 625 of 1064