HD6417751 Datasheet, PDF (1003/1105 Pages) Renesas Technology Corp – SuperH RISC engine

CKIO
t_BREQH
t_BREQS
t_BREQH
t_BACKD
t_BREQS
t_BACKD
A25–A0, , ,
RD/ ,
,
,,
,,
t_BOFF1
t_BON1
Figure 23.11 Control Signal Timing
Normal operation
Standby mode
Normal operation
CKIO
STATUS0, STATUS1
Normal
t_STD2
Standby
,,
,,
,
/,
,
,
t_BOFF2
t_STD1
Normal
t_BON2
A25–A0, D31–D0
DACKn, DRAKn, SCK,
* ^{TXD, TXD2, CTS2,}
RTS2
Note: * When the PHZ bit in STBCR is set to 1, these pins go to the high-impedance state (except
for pins being used as port pins, which retain their port state).
Figure 23.12 Pin Drive Timing for Standby Mode
Rev. 3.0, 04/02, page 963 of 1064