HD6417751 Datasheet, PDF (1066/1105 Pages) Renesas Technology Corp – SuperH RISC engine

PCICLK
Input
0.4V_DDQ
t_PCISU t_PCIH
0.4V_DDQ
0.4V_DDQ
Figure 23.72 Output Signal Timing
Table 23.32 PCIC Signal Timing
(With PCIREQ/PCIGNT Port Settings in Non-Host Mode) (1)
HD6417751RBP240, HD6417751RBP200, HD6417751RF240, HD6417751RF200:
V_DDQ = 3.0 to 3.6 V, V_DD = 1.5 V, T_a = –20 to 75°C, C_L = 30 pF
Pin
Item
Symbol Min
3&,5(4/MD9
3&,5(4/MD10
Output data delay t_PCIPORTD
—
time
3&,5(4
Input hold time
t_PCIPORTH
1.5
Input setup time
t_PCIPORTS
3.5
3&,*17–3&,*17 Output data delay t_PCIPORTD
—
time
Max Unit Figure
10
ns
23.73
—
ns
23.73
—
ns
23.73
10
ns
23.73
Table 23.33 PCIC Signal Timing
(With PCIREQ/PCIGNT Port Settings in Non-Host Mode) (2)
HD6417751BP167, HD6417751F167: V_DDQ = 3.0 to 3.6 V, V_DD = 1.8 V, Ta = –20 to 75°C,
C_L = 30 pF
HD6417751BP167I, HD6417751F167I: V_DDQ = 3.0 to 3.6 V, V_DD = 1.8 V, Ta = –40 to 85°C,
C_L = 30 pF
Pin
Item
Symbol Min
3&,5(4/MD9
3&,5(4/MD10
Output data delay t_PCIPORTD
—
time
3&,5(4
Input hold time
t_PCIPORTH
1.5
Input setup time
t_PCIPORTS
3.5
3&,*17–3&,*17 Output data delay t_PCIPORTD
—
time
Max Unit Figure
10
ns
23.73
—
ns
23.73
—
ns
23.73
10
ns
23.73
Rev. 3.0, 04/02, page 1026 of 1064