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| HD6417751 Datasheet, PDF (720/1105 Pages) Renesas Technology Corp – SuperH RISC engine | |||
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17.1.2 Block Diagram
Figure 17.1 shows a block diagram of the smart card interface.
Module data bus
SCRDR1
RxD
SCRSR1
TxD
SCK
SCTDR1
SCTSR1
SCSCMR1
SCSSR1
SCSCR1
SCSMR1
SCSPTR1
SCBRR1
Baud rate
generator
Transmission/
reception
control
Parity generation
Clock
Parity check
External clock
SCI
SCSCMR1: Smart card mode register
SCRSR1: Receive shift register
SCRDR1: Receive data register
SCTSR1: Transmit shift register
SCTDR1: Transmit data register
SCSMR1: Serial mode register
SCSCR1: Serial control register
SCSSR1: Serial status register
SCBRR1: Bit rate register
SCSPTR1: Serial port register
Figure 17.1 Block Diagram of Smart Card Interface
Internal
data bus
PÏ
PÏ/4
PÏ/16
PÏ/64
TXI
RXI
ERI
Rev. 3.0, 04/02, page 680 of 1064
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