HD6417751 Datasheet, PDF (418/1105 Pages) Renesas Technology Corp – SuperH RISC engine

13.3.4 DRAM Interface
Direct Connection of DRAM: When the memory type bits (DRAMTP2–0) in BCR1 are set to
100, area 3 becomes DRAM interface. The DRAM interface function can then be used to connect
DRAM to the SH7751 Series.
16 or 32 bits can be selected as the interface data width.
2-CAS 16-bit DRAMs can be connected, since &$6 is used to control byte access.
Signals used for connection are &6, 5$6, &$6 to &$6, and RD/:5. &$6 to &$6 are not
used when the data width is 16 bits.
In addition to normal read and write access modes, fast page mode is supported for burst access.
EDO mode, which enables the DRAM access time to be increased, is supported.
SH7751 Series
A10
A2
256k × 16-bit
DRAM
A8
A0
RD/
D31
D16
D15
D0
I/O15
I/O0
A8
A0
I/O15
I/O0
Figure 13.13 Example of DRAM Connection (32-Bit Data Width, Area 3)
Rev. 3.0, 04/02, page 378 of 1064