HD6417751 Datasheet, PDF (163/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Table 5.2 Exceptions (cont)
Exception Execution
Category Mode
Exception
Priority Priority Vector
Level Order Address
Interrupt Completion Nonmaskable interrupt
3
type
External IRL3–IRL0 0
4
interrupts
1
—
(VBR)
*2
(VBR)
2
3
4
5
6
7
8
9
A
B
C
D
E
Peripheral TMU0
module _TMU1
interrupt
(module/ ^TMU2
source)
TUNI0 4
TUNI1
TUNI2
TICPI2
*2
(VBR)
TMU3
TUNI3
TMU4
TUNI4
RTC
ATI
PRI
CUI
SCI
ERI
RXI
TXI
TEI
WDT
ITI
REF
RCMI
ROVI
Exception
Offset Code
H'600 H'1C0
H'600 H'200
H'220
H'240
H'260
H'280
H'2A0
H'2C0
H'2E0
H'300
H'320
H'340
H'360
H'380
H'3A0
H'3C0
H'600 H'400
H'420
H'440
H'460
H'B00
H'B80
H'480
H'4A0
H'4C0
H'4E0
H'500
H'520
H'540
H'560
H'580
H'5A0
Rev. 3.0, 04/02, page 123 of 1064