HD6417751 Datasheet, PDF (638/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Table 15.8 SCSMR1 Settings for Serial Transfer Format Selection
SCSMR1 Settings
SCI Transfer Format
Bit 7: Bit 6: Bit 2: Bit 5: Bit 3:
C/ CHR MP PE STOP Mode
Data
Length
Multi-
processor Parity Stop Bit
Bit
Bit Length
0
0
0
0
0
Asynchronous 8-bit data No
1
mode
No 1 bit
2 bits
1
0
Yes 1 bit
1
2 bits
1
0
0
7-bit data
No 1 bit
1
2 bits
1
0
Yes 1 bit
1
2 bits
0
1
*
0
Asynchronous 8-bit data Yes
1
mode
(multiprocessor
1
0
format)
7-bit data
1
No 1 bit
2 bits
1 bit
2 bits
1
*
*
*
*
Synchronous 8-bit data No
mode
None
Note: An asterisk in the table means “Don’t care.”
Table 15.9 SCSMR1 and SCSCR1 Settings for SCI Clock Source Selection
SCSMR1
Bit 7:
C/
0
1
SCSCR1 Setting
Bit 1:
CKE1
Bit 0:
CKE0
0
0
1
1
0
1
0
0
1
1
0
1
Mode
Asynchronous
mode
SCI Transmit/Receive Clock
Clock
Source SCK Pin Function
Internal SCI does not use SCK pin
Outputs clock with same
frequency as bit rate
External Inputs clock with frequency of
16 times the bit rate
Synchronous
mode
Internal Outputs serial clock
External Inputs serial clock
Rev. 3.0, 04/02, page 598 of 1064