HD6417751 Datasheet, PDF (476/1105 Pages) Renesas Technology Corp – SuperH RISC engine

CKIO
/
D31–D0
Tm1
Tmd1w Tmd1w
Tmd1
A
D0
RD/
DACKn
(DA)
Note: For DACKn, an example is shown where CHCRn.AL (access level) = 0 for the DMAC.
Figure 13.53 MPX Interface Timing 2 (Single Read, AnW = 0, One External Wait Inserted)
Rev. 3.0, 04/02, page 436 of 1064