HD6417751 Datasheet, PDF (260/1105 Pages) Renesas Technology Corp – SuperH RISC engine

Bit 0: MSTP0
0
1
Description
SCI operates
SCI clock supply is stopped
(Initial value)
9.2.2 Peripheral Module Pin High Impedance Control
When bit 6 in the standby control register (STBCR) is set to 1, peripheral module related pins go
to the high-impedance state in standby mode.
• Relevant Pins
SCI related pins
DMA related pins
SCK
TXD
MD7/&76
DACK0
DACK1
MD0/SCK2
MD1/TXD2
MD8/576
DRAK0
DRAK1
• Other Information
The setting in this register is invalid when the above pins are used as port output pins.
For details of pin states, see Appendix D, Pin Functions.
9.2.3 Peripheral Module Pin Pull-Up Control
When bit 5 in the standby control register (STBCR) is cleared to 0, peripheral module related pins
are pulled up when in the input or high-impedance state.
• Relevant Pins
SCI related pins
DMA related pins
TMU related pin
MD0/SCK2
MD7/&76
RXD
'5(4
'5(4
TCLK
MD1/TXD2
MD8/576
TXD
DACK0
DACK1
MD2/RXD2
SCK
DRAK0
DRAK1
Rev. 3.0, 04/02, page 220 of 1064